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PRODUCT SPECIFICATION
Single chip 433/868/915 MHz Transceiver NRF905
FEATURES
* * * * * * * * * * * * * * * True single chip GFSK transceiver in a small 32-pin package (32L QFN 5x5mm) ShockBurstTM mode for low power operation Power supply range 1.9 to 3.6 V Multi channel operation - ETSI/FCC Compatible Channel switching time <650s Extremely low cost Bill of Material (BOM) No external SAW filter Adjustable output power up to 10dBm Carrier detect for "listen before transmit" protocols Data Ready signal when a valid data package is received or transmitted Address Match for detection of incoming package Automatic retransmission of data packages Automatic CRC and preamble generation Low supply current (TX), typical 11mA @ -10dBm output power Low supply current (RX), typical 12.5mA
APPLICATIONS
* * * * * * * * * * Wireless data communication Alarm and security systems Home Automation Remote control Surveillance Automotive Telemetry Industrial sensors Keyless entry Toys
GENERAL DESCRIPTION
NRF905 is a single-chip radio transceiver for the 433/868/915 MHz ISM band. The transceiver consists of a fully integrated frequency synthesiser, receiver chain with demodulator, a power amplifier, a crystal oscillator and a modulator. The ShockBurstT M feature automatically handles preamble and CRC. Configuration is easily programmable by use of the SPI interface. Current consumption is very low, in transmit only 11mA at an output power of -10dBm, and in receive mode 12.5mA. Built in power down modes makes power saving easily realizable.
QUICK REFERENCE DATA
Parameter Minimum supply voltage Maximum transmit output power Transmitted data rate (Manchester-encoder embedded) Supply current in transmit @ -10dBm output power Supply current in receive mode Temperature range Typical Sensitivity Supply current in power down mode Value 1.9 10 100 11 12.5 -40 to +85 -100 2.5 Unit V dBm kbps mA mA C dBm
Table 1 NRF905 quick reference data.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
ORDERING INFORMATION
Type Number NRF905 IC NRF905-EVKIT 433 NRF905-EVKIT 868/915 Description 32L QFN 5x5mm Evaluation kit 433MHz Evaluation kit 868/915MHz Version 1.0 1.0
Table 2 NRF905 ordering information.
BLOCK DIAGRAM
DVDD_1V2 (31)
VDD (17)
VDD (25)
VSS (16)
VSS (18)
VSS (21)
VSS (24)
VSS (26)
VSS (27)
VSS (28)
VSS (29)
VSS (30)
VDD (4)
VSS (5)
VSS (9)
MISO (10) MOSI (11) SCK (12) CSN (13)
XC1 (14)
IF BBF
TRX_CE (1) PWR_UP (2) TX_EN (32)
SPI interface TX - addr. TX - reg. RX - reg. Config-reg. ShockBurst Demod Dataslicer CRC code/ decode Address decode GFSK filter Manchester encoder/ decoder
Voltage regulators
Crystal oscillator
XC2 (15)
LNA
Frequency Synthesiser
VDD_PA (19)
CD (6) AM (7) DR (8)
ANT1 (20)
PA
uPCLK (3)
ANT2 (21)
IREF (23)
Figure 1 NRF905 with external components.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PIN FUNCTIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Name TRX_CE PWR_UP uPCLK VDD VSS CD AM DR VSS MISO MOSI SCK CSN XC1 XC2 VSS VDD VSS VDD_PA ANT1 ANT2 VSS IREF VSS VDD VSS VSS VSS VSS VSS DVDD_1V2 TX_EN Pin function Digital input Digital input Clock output Power Power Digital output Digital output Digital output Power SPI - interface SPI - interface SPI - Clock SPI - enable Analog Input Analog Output Power Power Power Power output RF RF Power Analog Input Power Power Power Power Power Power Power Power Digital input Description Enables chip for receive and transmit Power up chip Output clock, divided crystal oscillator full-swing clock Power supply (+3V DC) Ground (0V) Carrier Detect Address Match Receive and transmit Data Ready Ground (0V) SPI output SPI input SPI clock SPI enable, active low Crystal pin 1/ External clock reference pin Crystal pin 2 Ground (0V) Power supply (+3V DC) Ground Positive supply (1.8V) to NRF905 power amplifier Antenna interface 1 Antenna interface 2 Ground (0V) Reference current Ground (0V) Power supply (+3V DC) Ground (0V) Ground (0V) Ground (0V) Ground (0V) Ground (0V) Low voltage positive digital supply output for de-coupling TX_EN="1"TX mode, TX_EN="0"RX mode
Table 3 NRF905 pin function.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PIN ASSIGNMENT
TX_EN DVDD_1V2 VSS VSS VSS VSS VSS VDD
32
TRX_CE
31
30
29
28
27
26
25 24
VSS
1 2 3 4 5 6 7 8 9
VSS
PWR_UP
NRF905
32L QFN 5x5
23 22 21 20 19 18 17
IREF
uPCLK
VSS
VDD
ANT2
VSS
ANT1
CD
VDD_PA
AM
VSS
DR
VDD
10
MISO
11
MOSI
12
SCK
13
CSN
14
XC1
15
XC2
16
VSS
Figure 2 NRF905 pin assignment (top view) for a 32L QFN 5x5 package.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
ELECTRICAL SPECIFICATIONS
Symbol Parameter (condition) Notes Min.
1.9 -40
Typ.
3.0 27
Max.
3.6 85
Units
V C
Operating conditions
VDD TEMP Supply voltage Operating temperature
Digital input pin
VIH VIL HIGH level input voltage LOW level input voltage VDD-0.3 VSS VDD 0.3 V V
Digital output pin
VOH VOL HIGH level output voltage (IOH=-0.5mA) LOW level output voltage (IOL=0.5mA) VDD-0.3 VSS VDD 0.3 V V A A A A
General electrical specification
Istby_eclk Istby_dclk IPD ISPI Supply current in standby, uCLK enabled Supply current in standby, uCLK disabled Supply current in power down mode Supply current in SPI programming 1) 2) 3) 100 12.5 2.5 20
General RF conditions
fOP fXTAL f RGFSK fCH433 fCH868/915 Operating frequency Crystal frequency Frequency deviation GFSK data rate, Manchester-encoded Channel spacing for 433MHz band Channel spacing for 868/915MHz band 4) 5) 430 4 42 50 100 100 200 928 20 58 MHz MHz kHz kbps kHz kHz
Transmitter operation
PRF10 PRF6 PRF-2 PRF-10 PBW PRF1 PRF2 ITX10dBm ITX-10dBm Output power 10dBm setting Output power 6dBm setting Output power -2dBm setting Output power -10dBm setting 20dB bandwidth for modulated carrier 1st adjacent channel transmit power 2nd adjacent channel transmit power Supply current @ 10dBm output power Supply current @ -10dBm output power 6) 6) 6) 6) 7) 7) 7 3 -6 -14 10 6 -2 -10 190 -27 -54 30 11 11 9 2 -6 dBm dBm dBm dBm kHz dBc dBc mA mA
Receiver operation
IRX RXSENS RXMAX C/ICO C/I1ST C/I2ND C/IIM Supply current in receive mode Sensitivity at 0.1%BER Maximum received signal C/I Co-channel 1st adjacent channel selectivity C/I 200kHz 2nd adjacent channel selectivity C/I 400kHz Image rejection 12.5 -100 0 8) 8) 8) 8) 13 -7 -16 -30 mA dBm dBm dB dB dB dB
Table 4 NRF905 electrical specifications.
1) 2) 3) 4) 5) 6) 7) 8) Output frequency is 4MHz load of external clock pin is 5pF, Crystal is 4MHz. Crystal is 4MHz. Chip in power down, SPI_SCK frequency is 1MHz. Operates in the 433, 868 and 915 MHz ISM band. The crystal frequency may be chosen from 5 different values (4, 8, 12, 16, and 20MHz) Optimum load impedance, please see peripheral RF information. Channel width and channel spacing is 200kHz. Channel Level +3dB over sensitivity, interfering signal a standard CW, image lies 2MHz above wanted.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
CURRENT CONSUMPTION
OUTPUT TYPICAL CLOCK CURRENT FREQ. [MHZ] Power Down 16 OFF 2.5 uA Standby 4 OFF 12 uA Standby 8 OFF 25 uA Standby 12 OFF 27 uA Standby 16 OFF 32 uA Standby 20 OFF 46 uA Standby 4 0.5 110 uA Standby 8 0.5 125 uA Standby 12 0.5 130 uA Standby 16 0.5 135 uA Standby 20 0.5 150 uA Standby 4 1 130 uA Standby 8 1 145 uA Standby 12 1 150 uA Standby 16 1 155 uA Standby 20 1 170 uA Standby 4 2 170 uA Standby 8 2 185 uA Standby 12 2 190 uA Standby 16 2 195 uA Standby 20 2 210 uA Standby 4 4 260 uA Standby 8 4 275 uA Standby 12 4 280 uA Standby 16 4 285 uA Standby 20 4 300 uA Rx @ 433 16 OFF 12.2 mA Rx @ 868/915 16 OFF 12.8 mA Reduced Rx 16 OFF 10.5 mA Tx @ 10dBm 16 OFF 30 mA Tx @ 6dBm 16 OFF 20 mA Tx @ -2dBm 16 OFF 14 mA Tx @ -10dBm 16 OFF 11 mA Conditions: VDD = 3.0V, VSS = 0V, TA = 27C, Load capacitance of external clock = 13pF, Crystal load capacitance = 12pF MODE CRYSTAL FREQ. [MHZ]
Table 5 NRF905 current consumption.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PACKAGE OUTLINE
NRF905 uses the QFN 32L 5x5 green package with a mat tin finish. Dimensions are in mm. Recommended soldering reflow profile can be found in application note nAN400-08, QFN soldering reflow guidelines, www.nordicsemi.no.
+
Package Type QFN32 (5x5 mm) A 0.8 0.9 A1 0.0 0.05 A2 0.65 0.69 b 0.18 0.23 0.3 D 5 BSC E 5 BSC e 0.5 BSC J 3.2 3.3 3.4 K 3.2 3.3 3.4 L 0.3 0.4 0.5
Min typ. Max
Figure 3 NRF905 package outline.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
ABSOLUTE MAXIMUM RATINGS
Supply Voltages VDD...............................- 0.3V to + 3.6V VSS ..................................................... 0V Input Voltage VI ..........................- 0.3V to VDD + 0.3V Output Voltage VO .........................- 0.3V to VDD + 0.3V
Total Power Dissipation PD (TA=85C)................................ 200mW Temperatures Operating temperature............................................ - 40C to + 85C Storage temperature...............................................- 40C to + 125C Note: Stress exceeding one or more of the limiting values may cause permanent damage to the device.
ATTENTION! Electrostatic sensitive device. Observe precaution for handling.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
GLOSSARY OF TERMS
Term ADC AM CD CLK CRC DR GFSK ISM kSPS MCU PWR_DWN PWR_UP RX SPI CSN MISO MOSI SCK SPS STBY TRX_EN TX TX_EN Description Analog to Digital Converter Address Match Carrier Detect Clock Cyclic Redundancy Check Data Ready Gaussian Frequency Shift Keying Industrial-Scientific-Medical kilo Samples per Second Micro Controller Unit Power Down Power Up Receive Serial Programmable Interface SPI Chip Select Not SPI Master In Slave Out SPI Master Out Slave In SPI Serial Clock Samples per Second Standby Transmit/Receive Enable Transmit Transmit Enable
Table 6 Glossary of terms.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
MODES OF OPERATION
The NRF905 has two active (RX/TX) modes and two power-saving modes Active Modes
* *
ShockBurstTM RX ShockBurstTM TX
Power Saving Modes * Power down and SPI - programming * Standby and SPI - programming The NRF905 mode is decided by the settings of TRX_CE, TX_EN and PWR_UP.
PWR_UP 0 1 1 1 1 TRX_CE X 0 X 1 1 TX_EN X X 0 0 1 Operating Mode Power down and SPI - programming Standby and SPI - programming Read data from RX register Radio Enabled - ShockBurstTM RX Radio Enabled - ShockBurstTM TX
Table 7 NRF905 operational modes.
nRF ShockBurstTM Mode The NRF905 uses the Nordic Semiconductor ASA ShockBurstTM feature. ShockBurstT M makes it possible to use the high data rate offered by the NRF905 without the need of a costly, high-speed micro controller (MCU) for data processing/clock recovery. By placing all high speed signal processing related to RF protocol on-chip, the NRF905 offers the application micro controller a simple SPI interface, the data rate is decided by the interface-speed the micro controller itself sets up. By allowing the digital part of the application to run at low speed, while maximizing the data rate on the RF link, the NRF905 ShockBurstTM mode reduces the average current consumption in applications. In ShockBurstTM RX, Address Match (AM) and Data Ready (DR) notifies the MCU when a valid address and payload is received respectively. In ShockBurstT M TX, the NRF905 automatically generates preamble and CRC. Data Ready (DR) notifies the MCU that the transmission is completed. All together, this means reduced memory demand in the MCU resulting in a low cost MCU, as well as reduced software development time.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Typical ShockBurstTM TX: 1. When the application MCU has data for a remote node, the address of the receiving node (TX-address) and payload data (TX-payload) are clocked into NRF905 via the SPI interface. The application protocol or MCU sets the speed of the interface. 2. MCU sets TRX_CE and TX_EN high, this activates a NRF905 ShockBurstTM transmission. 3. NRF905 ShockBurstTM: * Radio is automatically powered up. * Data package is completed (preamble added, CRC calculated). * Data package is transmitted (100kbps, GFSK, Manchester-encoded). * Data Ready is set high when transmission is completed. 4. If AUTO_RETRAN is set high, the NRF905 continuously retransmits the package until TRX_CE is set low. 5. When TRX_CE is set low, the NRF905 finishes transmitting the outgoing package and then sets itself into standby mode.
The ShockBurstT M mode ensures that a transmitted package that has started always finishes regardless of what TRX_EN and TX_EN is set to during transmission. The new mode is activated when the transmission is completed. Please see subsequent chapters for detailed timing For test purposes such as antenna tuning and measuring output power it is possible to set the transmitter so that a constant carrier is produced. To do this TRX_CE must be maintained high instead of being pulsed. In addition Auto Retransmit should be switched off. After the burst of data has been sent then the device will continue to send the unmodulated carrier.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Radio in Standby TX_EN = HI PWR_UP = HI TRX_CE = LO
Data Package
SPI - programming uController loading ADDR and PAYLOAD data (Configuration register if changes since last TX/RX) ADDR PAYLOAD
TRX_CE = HI ?
NO
YES Transmitter is powered up
nRF ShockBurst TX Generate CRC and preamble Sending package DR is set high when completed DR is set low after preamble Preamble ADDR PAYLOAD CRC
NO TRX_CE = HI ? AUTO_ RETRAN = HI ? YES Bit in configuration register
NO
YES
Figure 4 Flowchart ShockBurstT M transmit of NRF905. NB: DR is set low under the following conditions after it has been set high: * If TX_EN is set low * If PWR_UP is set low
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Typical ShockBurstTM RX: 1. ShockBurstT M RX is selected by setting TRX_CE high and TX_EN low. 2. After 650s NRF905 is monitoring the air for incoming communication. 3. When the NRF905 senses a carrier at the receiving frequency, Carrier Detect (CD) pin is set high. 4. When a valid address is received, Address Match (AM) pin is set high. 5. When a valid package has been received (correct CRC found), NRF905 removes the preamble, address and CRC bits, and the Data Ready (DR) pin is set high. 6. MCU sets the TRX_CE low to enter standby mode (low current mode). 7. MCU can clock out the payload data at a suitable rate via the SPI interface. 8. When all payload data is retrieved, NRF905 sets Data Ready (DR) and Address Match (AM) low again. 9. The chip is now ready for entering ShockBurstTM RX, ShockBurstT M TX or power down mode.
If TRX_CE or TX_EN is changed during an incoming package, the NRF905 changes mode immediately and the package is lost. However, if the MCU is sensing the Address Match (AM) pin, it knows when the chip is receiving an incoming package and can therefore decide whether to wait for the Data Ready (DR) signal or enter a different mode. To avoid spurious address matches it is recommended that the address length be 24 bits or higher in length. Small addresses such as 8 or 16 bits can often lead to statistical failures due to the address being repeated as part of the data packet. This can be avoided by using a longer address. Each byte within the address should be unique. Repeating bytes within the address reduces the effectiveness of the address and increases its susceptibility to noise hence increasing the packet error rate. The address should also have several level shifts (i.e. 10101100) to reduce the statistical effect of noise and hence reduce the packet error rate.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Radio in Standby TX_EN = LO PWR_UP = HI
TRX_CE = HI ? YES Receiver is powered up
NO
Receiver Sensing for incomming data CD is set high if carrier
Data Package
NO
Correct ADDR? YES AM is set high
Preamble
ADDR
PAYLOAD
CRC
Receiving data
AM is set low
NO
Correct CRC? YES DR high is set high DR and AM are set low DR and AM are set low
MCU clocks out payload via the SPI interface
MCU clocks out payload via the SPI interface
PAYLOAD
TRX_CE = HI ?
YES
RX Remains On
Radio enters STBY
NO
Figure 5 Flowchart ShockBurstT M receive of NRF905.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Power Down Mode In power down the NRF905 is disabled with minimal current consumption, typically less than 2.5A. When entering this mode the device is not active which will minimize average current consumption and maximizing battery lifetime. The configuration word content is maintained during power down.
Standby Mode Standby mode is used to minimize average current consumption while maintaining short start up times to ShockBurstT M RX and ShockBurstT M TX. In this mode part of the crystal oscillator is active. Current consumption is dependent on crystal frequency, Ex: IDD= 12A @4MHz and IDD =46A @20MHz. If the uP-clock (pin 3) of NRF905 is enabled, current consumption increases and is dependent on the load capacitance and frequency. The configuration word content is maintained during standby.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
DEVICE CONFIGURATION
All configuration of the NRF905 is via the SPI interface. The interface consists of five registers; a SPI instruction set is used to decide which operation shall be performed. The SPI interface can be activated in any mode however Nordic Semiconductor ASA recommends the chip be in standby or power down mode. SPI Register Configuration The SPI interface consists of five internal registers. A register read-back mode is implemented to allow verification of the register contents.
MISO MOSI SCK CSN EN I/O-reg DTA CLK STATUS-REGISTER
EN DTA CLK RF - CONFIGURATION REGISTER
EN DTA CLK TX-ADDRESS
EN DTA CLK TX-PAYLOAD
EN DTA CLK RX-PAYLOAD
Figure 6 SPI - interface and the five internal registers. Status - Register Register contains status of Data Ready (DR) and Address Match (AM). RF - Configuration Register Register contains transceiver setup information such as frequency and output power ext. TX - Address Register contains address of target device. How many bytes used is set in the configuration register. TX - Payload Register containing the payload information to be sent in a ShockBurst How many bytes used is set in the configuration register. RX - Payload Register containing the payload information derived from a received valid ShockBurst TM package. How many bytes used is set in the configuration register. Valid data in the RX-Payload register is indicated with a high Date Ready (DR) signal.
TM
package.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
SPI Instruction Set The available commands to be used on the SPI interface is shown below. Whenever CSN is set low the interface expects an instruction. Every new instruction must be started by a high to low transition on CSN.
Instruction set for the NRF905 SPI Serial Interface Instruction Operation Format W_CONFIG 0000 AAAA Write Configuration-register. AAAA indicates which byte (WC) the write operation is to be started from. Number of bytes depends on start address AAAA. R_CONFIG 0001 AAAA Read Configuration-register. AAAA indicates which byte (RC) the read operation is to be started from. Number of bytes depends on start address AAAA. W_TX_PAYLOAD 0010 0000 Write TX-payload: 1 - 32 bytes. A write operation will (WTP) always start at byte 0. R_TX_PAYLOAD 0010 0001 Read TX-payload: 1 - 32 bytes. A read operation will (RTP) always start at byte 0. W_TX_ADDRESS 0010 0010 Write TX-address: 1 - 4 bytes. A write operation will (WTA) always start at byte 0. R_TX_ADDRESS 0010 0011 Read TX-address: 1 - 4 bytes. A read operation will (RTA) always start at byte 0 R_RX_PAYLOAD 0010 0100 Read RX-payload: 1 - 32 bytes. A read operation will (RRP) always start at byte 0. CHANNEL_CONFIG 1000 pphc Special command for fast setting of CH_NO, (CC) cccc cccc HFREQ_PLL and PA_PWR in the CONFIGURATION REGISTER. CH_NO= ccccccccc, HFREQ_PLL = h PA_PWR = pp Instruction Name
Table 8 Instruction set for the NRF905 SPI interface. A read or a write operation may operate on a single byte or on a set of succeeding bytes from a given start address defined by the instruction. When accessing succeeding bytes one will read or write MSB of the byte with the smallest byte number first. The content of the status-register will always be read to MISO after a high to low transition on CSN.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
SPI Timing Data is clocked into or out of the device on the rising edge of the clock pulse. The clock speed is determined by the MCU and may be from 1Hz to 10MHz depending on the MCU. The device must be in one of the power saving modes for the configuration registers to be read or written to.
CSN
0
1
2
3
7
8
15
SCK
Command 8 bits, MSB = C7
MOSI
C 7
C 6
C 5
C 4
C 3
C 2
C 1
C 0
Status byte as output, MSB = S7
Addressed byte as output, MSB = O7 S 0 O 7 O 6 O 5 O 4 O 3 O 2 O 1 O 0 Succeeding bytes to addressed byte as output
MISO
S 7
S 6
S 5
S 4
S 3
S 2
S 1
Figure 7 SPI read operation.
CSN
0
1
2
3
7
8
15
SCK
Command 8 bits, MSB = C7
First data byte as input, MSB = D7 C 1 C 0 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0
MOSI
C 7
C 6
C 5
C 4
C 3
C 2
Succeeding data bytes as input
Status byte as output, MSB = S7
MISO
S 7
S 6
S 5
S 4
S 3
S 2
S 1
S 0
Figure 8 SPI write operation.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
RF - Configuration - Register Description
Parameter CH_NO HFREQ_ PLL PA_PWR Bitwidth 9 1 Description Sets center freq. together with HFREQ_PLL (default = 001101100b = 108d). fRF = ( 422.4 + CH_NOd /10)*(1+HFREQ_PLLd) MHz Sets PLL in 433 or 868/915 MHz mode (default = 0). '0' - Chip operating in 433MHz band '1' - Chip operating in 868 or 915 MHz band Output power (default = 00). '00' -10dBm '01' -2dBm '10' +6dBm '11' +10dBm Reduces current in RX mode by 1.6mA. Sensitivity is reduced (default = 0). '0' - Normal operation '1' - Reduced power Retransmit contents in TX register if TRX_CE and TXEN are high (default = 0). '0' - No retransmission '1' - Retransmission of data package RX-address width (default = 100). '001' - 1 byte RX address field width '100' - 4 byte RX address field width TX-address width (default = 100). '001' - 1 byte TX address field width '100' - 4 byte TX address field width RX-payload width (default = 100000). '000001' - 1 byte RX payload field width '000010' - 2 byte RX payload field width . '100000' - 32 byte RX payload field width TX-payload width (default = 100000). '000001' - 1 byte TX payload field width '000010' - 2 byte TX payload field width . '100000' - 32 byte TX payload field width RX address identity. Used bytes depend on RX_AFW (default = E7E7E7E7h). Output clock frequency (default = 11). '00' - 4MHz '01' - 2MHz '10' - 1MHz '11' - 500kHz Output clock enable (default = 1). '0' - No external clock signal available '1' - External clock signal enabled Crystal oscillator frequency. Must be set according to external crystal resonantfrequency (default = 100). '000' - 4MHz '001' - 8MHz '010' - 12MHz '011' - 16MHz '100' - 20MHz CRC - check enable (default = 1). '0' - Disable '1' - Enable CRC - mode (default = 1). '0' - 8 CRC check bit '1' - 16 CRC check bit
2
RX_RED_ PWR AUTO_ RETRAN RX_AFW
1
1
3
TX_AFW
3
RX_PW
6
TX_PW
6
RX_ ADDRESS UP_CLK_ FREQ
32 2
UP_CLK_ EN XOF
1
3
CRC_EN
1
CRC_ MODE
1
Table 9 Configuration-register description.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Register Contents
Byte # 0 1 2 3 4 5 6 7 8 9 RF-CONFIG_REGISTER (R/W) Content bit[7:0], MSB = bit[7] CH_NO[7:0] bit[7:6] not used, AUTO_RETRAN, RX_RED_PWR, PA_PWR[1:0], HFREQ_PLL, CH_NO[8] bit[7] not used, TX_AFW[2:0] , bit[3] not used, RX_AFW[2:0] bit[7:6] not used, RX_PW[5:0] bit[7:6] not used, TX_PW[5:0] RX_ADDRESS (device identity) byte 0 RX_ADDRESS (device identity) byte 1 RX_ADDRESS (device identity) byte 2 RX_ADDRESS (device identity) byte 3 CRC_MODE,CRC_EN, XOF[2:0], UP_CLK_EN, UP_CLK_FREQ[1:0] TX_PAYLOAD (R/W) Content bit[7:0], MSB = bit[7] TX_PAYLOAD[7:0] TX_PAYLOAD[15:8] TX_PAYLOAD[247:240] TX_PAYLOAD[255:248] TX_ADDRESS (R/W) Content bit[7:0], MSB = bit[7] TX_ADDRESS[7:0] TX_ADDRESS[15:8] TX_ADDRESS[23:16] TX_ADDRESS[31:24] RX_PAYLOAD (R) Content bit[7:0], MSB = bit[7] RX_PAYLOAD[7:0] RX_PAYLOAD[15:8] RX_PAYLOAD[247:240] RX_PAYLOAD[255:248] STATUS_REGISTER (R) Content bit[7:0], MSB = bit[7]
AM, bit [6] not used, DR, bit [0:4] not used
Init value
0110_1100 0000_0000 0100_0100 0010_0000 0010_0000 E7 E7 E7 E7 1110_0111
Byte # 0 1 30 31
Init value
X X X X X X
Byte # 0 1 2 3
Init value
E7 E7 E7 E7
Byte # 0 1
Init value
X X X X X X
30 31
Byte # 0
Init value
X
Table 10 RF register contents. The length of all registers is fixed. However, the bytes in TX_PAYLOAD, RX_PAYLOAD, TX_ADDRESS and RX_ADDRESS used in ShockBurst T M RX/TX are set in the configuration register. Register content is not lost when the device enters one of the power saving modes.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
IMPORTANT TIMING DATA
The following timing must be obeyed during NRF905 operation. Device Switching Times
NRF905 timing PWR_DWN e ST_BY mode STBY e TX Shock BurstTM STBY e RX Shock BurstTM RX Shock BurstTM e TX Shock BurstTM TX Shock BurstTM e RX Shock BurstTM Notes to table: 1) Max. 3 ms 650 s 650 s 550 1 s 550 1 s
RX to TX or TX to RX switching is available without re-programming of the RF configuration register. The same frequency channel is maintained.
Table 11 Switching times for NRF905. ShockBurstTM TX timing
MOSI
CSN
PWR_UP
TX_EN
TRX_CE
TX DATA
TIME Programming of Configuration Register and TX Data Register T0 T1 T2 Transmitted Data 100kbps Manchester Encoded T3
T0 T1 T2 T3
= = = =
Radio Enabled T0+10uS Minimum TRX_CE pulse T0 + 650uS.Start of TX Data transmission End of Data Packet, enter Standby mode
Figure 9 Timing diagram for standby to transmit.
After a data packet has finished transmitting the device will automatically enter Standby mode and wait for the next pulse of TRX_CE. If the Auto Re-Transmit function is enabled the data packet will continue re-sending the same data packet until TRX_CE is set low.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
ShockBurstTM RX timing
PWR_UP
TX_EN
TRX_CE
RX DATA
CD
AM
DR
TIME
650uS 650uS to enter RX mode from TRX_CE being set high.
T0 T0 T1 T2 T3 = = = =
T1
T2
T3
Receiver Enabled -Listening for Data Carrier Detect finds a carrier AM - Correct Address Found DR - Data packet with correct Address/CRC
Figure 10 Timing diagram for standby to receiving. After the Data Ready (DR) has been set high a valid data packet is available in the RX data register. This may be clocked out in RX mode or standby mode. After the data has been clocked out via the SPI interface the Data Ready (DR) and Address Match (AM) pins are reset to low. The RX register is reset if the PWR_UP pin is taken low or if the device is switched into TX mode i.e. TXEN is taken high. This will also results in the Data Ready(DR) and Address Match (AM) pins being reset to low.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PERIPHERAL RF INFORMATION
Crystal Specification Tolerance includes initially accuracy and tolerance over temperature and aging.
Frequency 4MHz 8MHz 12MHz 16MHz 20MHz CL 12pF 12pF 12pF 12pF 12pF ESR 150 100 100 100 100 C0max 7.0pF 7.0pF 7.0pF 7.0pF 7.0pF Tolerance @ 868/915 MHz 30ppm 30ppm 30ppm 30ppm 30ppm Tolerance @ 433 MHz 60ppm 60ppm 60ppm 60ppm 60ppm
Table 12 Crystal specification of NRF905. To achieve a crystal oscillator solution with low power consumption and fast start-up time, it is recommended to specify the crystal with a low value of crystal load capacitance. Specifying CL =12pF is acceptable, but it is possible to use up to 16pF. Specifying a lower value of crystal parallel equivalent capacitance, Co=1.5pF is also good, but this can increase the price of the crystal itself. Typically Co=1.5pF at a crystal specified for Co_max=7.0pF.
External Clock Reference An external reference clock, such as a MCU clock, may be used instead of a crystal. The clock signal should be applied directly to the XC1 pin, the XC2 pin can be left high impedance. When operating with an external clock instead of a crystal the clock must be applied in standby mode to achieve low current consumption. If the device is set into standby mode with no external clock or crystal then the current consumption will increase up to a maximum of 1mA.
Microprocessor Output Clock By default a microprocessor clock output is provided. Providing an output clock will increase the current consumption in standby mode. The current consumption in standby will depend on frequency and load of external crystal, frequency of output clock and capacitive load of the provided output clock. Typical current consumption values are found in Table 5
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Antenna Output The "ANT1 & ANT2" output pins provide a balanced RF output to the antenna. The pins must have a DC path to VDD_PA, either via a RF choke or via the center point in a dipole antenna. The load impedance seen between the ANT1/ANT2 outputs should be in the range 200-700. The optimum differential load impedance at the antenna ports is given as: 900MHz 430MHz 225+j210 300+j100
A low load impedance (for instance 50) can be obtained by fitting a simple matching network or a RF transformer (balun). Further information regarding balun structures and matching networks may be found in the Application Examples chapter.
Output Power Adjustment The power amplifier in NRF905 can be programmed to four different output power settings by the configuration register. By reducing output power, the total TX current is reduced.
Power setting RF output power DC current consumption
00 -10 dBm 11.0 mA 01 -2 dBm 14.0 mA 10 6 dBm 20.0 mA 11 10 dBm 30.0 mA Conditions: VDD = 3.0V, VSS = 0V, TA = 27C, Load impedance = 400 .
Table 13 RF output power setting for the NRF905.
Modulation The modulation of NRF905 is Gaussian Frequency Shift Keying (GFSK) with a datarate of 100kbps. Deviation is 50kHz. GFSK modulation results in a more bandwidth effective transmission-link compared with ordinary FSK modulation. The data is internally Manchester encoded (TX) and Manchester decoded (RX). That is, the effective symbol-rate of the link is 50kbps. By using internally Manchester encoding, no scrambling in the u-controller is needed.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Output Frequency The operating RF-frequency of NRF905 is set in the configuration register by CH_NO and HFREQ_PLL. The operating frequency is given by: f OP = ( 422.4 + (CH _ NO / 10)) (1 + HFREQ _ PLL) MHz When HFREQ_PLL is `0' the frequency resolution is 100kHz and when it is `1' the resolution is 200kHz. The application operating frequency has to be chosen to apply with the Short Range Devise regulation in the area of operation.
Operating frequency 430.0 MHz 433.1 MHz 433.2 MHz 434.7 MHz 862.0 MHz 868.2 MHz 868.4 MHz 869.8 MHz 902.2 MHz 902.4 MHz 927.8 MHz HFREQ_PLL [0] [0] [0] [0] [1] [1] [1] [1] [1] [1] [1] CH_NO [001001100] [001101011] [001101100] [001111011] [001010110] [001110101] [001110110] [001111101] [100011111] [100100000] [110011111]
Table 14 Examples of real operating frequencies.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PCB Layout and Decoupling Guidelines NRF905 is an extremely robust RF device due to internal voltage regulators and requires the minimum of RF layout protocols. However the following design rules should still be incorporated into the layout design. A PCB with a minimum of two layers including a ground plane is recommended for optimum performance. The NRF905 DC supply voltage should be decoupled as close as possible to the VDD pins with high performance RF capacitors. It is preferable to mount a large surface mount capacitor (e.g. 4.7F tantalum) in parallel with the smaller value capacitors. The NRF905 supply voltage should be filtered and routed separately from the supply voltages of any digital circuitry. Long power supply lines on the PCB should be avoided. All device grounds, VDD connections and VDD bypass capacitors must be connected as close as possible to the NRF905 IC. For a PCB with a topside RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom ground plane, the best technique is to place via holes as close as possible to the VSS pins. A minimum of one via hole should be used for each VSS pin. Full swing digital data or control signals should not be routed close to the crystal or the power supply lines. A fully qualified RF-layout for the NRF905 and its surrounding components, including antennas and matching networks, can be downloaded from www.nordicsemi.no.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
NRF905 FEATURES
Carrier Detect. When the NRF905 is in ShockBurst T M RX, the Carrier Detect (CD) pin is set high if a RF carrier is present at the channel the device is programmed to. This feature is very effective to avoid collision of packages from different transmitters operating at the same frequency. Whenever a device is ready to transmit it could first be set into receive mode and sense whether or not the wanted channel is available for outgoing data. This forms a very simple listen before transmit protocol. Operating Carrier Detect (CD) with Reduced RX Power mode is an extremely power efficient RF system. Typical Carrier Detect level (CD) is typically 5dB lower than sensitivity, i.e. if sensitivity is -100dBm then the Carrier Detect function will sense a carrier wave as low as -105dBm. Below -105dBm the Carrier Detect signal will be low, i.e. 0V. Above -95dBm the Carrier Detect signal will be high, i.e. Vdd. Between approximately -95 to -105 the Carrier Detect Signal will toggle.
Address Match When the NRF905 is in ShockBurst T M RX mode, the Address Match (AM) pin is set high as soon as an incoming package with an address that is identical with the device's own identity is received. With the Address Match pin the controller is alerted that the NRF905 is receiving data actually before the Data Ready (DR) signal is set high. If the Data Ready (DR) pin is not set high i.e. the CRC is incorrect then the Address Match (AM) pin is reset to low at the end of the received data packet. This function can be very useful for an MCU. If Address Match (AM) is high then the MCU can make a decision to wait and see if Data Ready (DR) will be set high indicating a valid data package has been received or ignore that a possible package is being received and switch modes.
Data Ready The Data Ready (DR) signal makes it possible to largely reduce the complexity of the MCU software program. In ShockBurst T M TX, the Data Ready (DR) signal is set high when a complete package is transmitted, telling the MCU that the NRF905 is ready for new actions. It is reset to low at the start of a new package transmission or when switched to a different mode i.e. receive mode or standby mode. In ShockBurst T M TX Auto Retransmit the Data Ready (DR) signal is set high at the beginning of the pre-amble and is set low at the end of the preamble. The Data Ready (DR) signal therefore pulses at the beginning of each transmitted data packet. In ShockBurst T M RX, the signal is set high when NRF905 has received a valid package, i.e. a valid address, package length and correct CRC. The MCU can then retrieve the payload via the SPI interface. The Data Ready (DR) pin is reset to low once the data has been clocked out of the data buffer or the device is switched to transmit mode.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Auto Retransmit One way to increase system reliability in a noisy environment or in a system without collision control is to transmit a package several times. This is easily accomplished with the Auto Retransmit feature in NRF905. By setting the AUTO_RETRAN bit to "1" in the configuration register, the circuit keeps sending the same data package as long as TRX_CE and TX_EN is high. As soon as TRX_CE is set low the device will finish sending the packet it is currently transmitting and then return to standby mode.
RX Reduced Power Mode To maximize battery lifetime in application where the NRF905 high sensitivity is not necessary; NRF905 offers a built in reduced power mode. In this mode, the receive current consumption reduces from 12.5mA to only 10.5mA. The sensitivity is reduced to typical -85dBm, 10dB. Some degradation of the NRF905 blocking performance should be expected in this mode. The reduced power mode is an excellent option when using Carrier Detect to sense if the wanted channel is available for outgoing data.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
APPLICATION EXAMPLE, DIFFERENTIAL CONNECTION TO A LOOP ANTENNA
aaaaaaaa VDD C7 10nF 0603 C5 33pF 0603 C6 4.7nF 0603
32 31 30 29 28 27 26 25
TXEN DVDD_1V2 VSS VSS VSS VSS VSS VDD
TXEN TRX_CE PWR_UP uPCLK aaaaaaaa VDD CD AM DR SPI_MISO SPI_MOSI SPI_SCK SPI_CSN
R2 22K 0603 24 23 22 21 20 19 18 17
J1 Loop Antenna 9.5x9.5mm C9 3.9pF R3 18K aaaaaaaa
1 2 3 4 5 6 7 8
TRX_CE PWR_UP uPCLK VDD VSS CD AM DR
NRF905
VSS IREF VSS ANT2 ANT1 VDD_PA VSS VDD
C10 4.7pF VDD C3 33pF C11 5.6pF
C8 33pF 0603 C4 3.3nF 0603 X1
9 10 11 12 13 14 15 16 16 MHz R1 1M C1 22pF 0603 aaaaaaaa C2 22pF 0603
U1 NRF905
Figure 11 NRF905 Application schematic, differential connection to a loop antenna (868MHz).
Component
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 R1 R2 R3 U1 X1
Description
NP0 ceramic chip capacitor, (Crystal oscillator) NP0 ceramic chip capacitor, (Crystal oscillator) NP0 ceramic chip capacitor, (PA supply decoupling) X7R ceramic chip capacitor, (PA supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) X7R ceramic chip capacitor, (Supply decoupling) X7R ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Antenna tuning) NP0 ceramic chip capacitor, (Antenna tuning) NP0 ceramic chip capacitor, (Antenna tuning) 0.1W chip resistor, (Crystal oscillator bias) 0.1W chip resistor, (Reference bias) 0.1W chip resistor, (Antenna Q reduction) NRF905 Transceiver Crystal
VSS MISO MOSI SCK CSN XC1 XC2 VSS
Size
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 QFN32L/5x5 LxWxH = 4.0x2.5x0.8
Value
22 22 33 3.3 33 4.7 10 33 3.9 4.7 5.6 1 22 18 16
Tol.
5% 5% 5% 10% 5% 10% 10% 5% 0.1 0.1 0.1 1% 1% 1% 30ppm
Units
pF pF pF nF pF nF nF pF pF pF pF M k k MHz
Table 15 Recommended external components, differential connection to a loop antenna (868MHz).
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PCB LAYOUT EXAMPLE, DIFFERENTIAL CONNECTION TO A LOOP ANTENNA
Figure 12 shows a PCB layout example for the application schematic in Figure 11. A double-sided FR-4 board of 1.6mm thickness is used. This PCB has a ground plane on the bottom layer. Additionally, there are ground areas on the component side of the board to ensure sufficient grounding of critical components. A large number of via holes connect the top layer ground areas to the bottom layer ground plane. There is no ground plane beneath the antenna.
No components in bottom layer
a) Top silk screen
b) Bottom silk screen
c) Top view
d) Bottom view
Figure 12 PCB layout example for NRF905, differential connection to a loop antenna. A fully qualified RF-layout for the NRF905 and its surrounding components, including antennas and matching networks, can be downloaded from www.nordicsemi.no.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
APPLICATION EXAMPLE, SINGLE ENDED CONNECTION TO 50 ANTENNA
xxx J1 1.9-3.6V GND 2 1 S1 C14 100nF 0603 VDD + C15 4.7uF/16V 3216 VDD Select
868/915MHz C3
VDD_C VDD_C
433MHz 180pF, 5%
33pF, 5%
C9
3.9pF, 0.25pF 18pF, 5%
C10 3.9pF, 0.25pF 18pF, 5% C11
VDD C7 10nF 0603 R3 10K 0603 JP1 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HEADER 16 C8 33pF 0603 C4 3.3nF 0603 VDD_C TXEN TRX_CE PWR_UP CD AM DR MISO MOSI SCK CSN U1 NRF905 VDD VDD_C 1 2 3 4 5 6 7 8 R4 10K 0603 R5 10K 0603 VDD C5 33pF 0603 C6 4.7nF 0603
Not fitted
Not fitted 6.8pF, 5% Not fitted 12nH, 5% 39nH, 5% 39nH, 5%
C12 33pF, 5% C13 Not fitted L1 L2 L3
32 31 30 29 28 27 26 25
12nH, 5% 12nH, 5% 12nH, 5%
TXEN DVDD_1V2 VSS VSS VSS VSS VSS VDD
R2 22K 0603 24 23 22 21 20 19 18 17
C9 0603
L 2 0603
C12 0603
C13 0603 50 ohm RF I/O xxx J2 SMA
TRX_CE PWR_UP uPCLK VDD VSS CD AM DR
NRF905
VSS IREF VSS ANT2 ANT1 VDD_PA VSS VDD
C11 Not fitted 0603 VDD
L 1 0603 L 3 0603 C3 0603
VSS MISO MOSI SCK CSN XC1 XC2 VSS
C10 0603
J3 uPCLK xxx GND 2 1 uPCLK
9 10 11 12 13 14 15 16 XC1
X1
XC2
16 MHz R1 1M J4 GND 1 C1 15pF 0603 C2 15pF 0603
xxx
Figure 13 NRF905 Application schematic, single ended connection to 50 antenna by using a differential to single ended matching network.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
Component
C1 C2 C3
Description
NP0 ceramic chip capacitor, (Crystal oscillator) NP0 ceramic chip capacitor, (Crystal oscillator) NP0 ceramic chip capacitor, (PA supply decoupling) @ 433MHz @ 868MHz @ 915MHz X7R ceramic chip capacitor, (PA supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) X7R ceramic chip capacitor, (Supply decoupling) X7R ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Supply decoupling) NP0 ceramic chip capacitor, (Impedance matching) @ 433MHz @ 868MHz @ 915MHz NP0 ceramic chip capacitor, (Impedance matching) @ 433MHz @ 868MHz @ 915MHz NP0 ceramic chip capacitor, (Impedance matching) NP0 ceramic chip capacitor, (Impedance matching) @ 433MHz @ 868MHz @ 915MHz NP0 ceramic chip capacitor, (Impedance matching) @ 433MHz @ 868MHz @ 915MHz Chip inductor, (Impedance matching) @ 433MHz: SRF> 433MHz @ 868MHz: SRF> 868MHz @ 915MHz: SRF> 915MHz Chip inductor, (Impedance matching) @ 433MHz: SRF> 433MHz @ 868MHz: SRF> 868MHz @ 915MHz: SRF> 915MHz Chip inductor, (Impedance matching) @ 433MHz: SRF> 433MHz @ 868MHz: SRF> 868MHz @ 915MHz: SRF> 915MHz 0.1W chip resistor, (Crystal oscillator bias) 0.1W chip resistor, (Reference bias) NRF905 Transceiver Crystal
Size
0603 0603 0603
Value
22 22 180 33 33 3.3 33 4.7 10 33 18 3.9 3.9
Tol.
5% 5% 5%
Units
pF pF pF
C4 C5 C6 C7 C8 C9
0603 0603 0603 0603 0603 0603
10% 5% 10% 10% 5% 5% <0.25pF <0.25pF
nF pF nF nF pF pF
C10
0603 18 3.9 3.9 Not fitted 6.8 33 33 0603 Not fitted Not fitted Not fitted 0603 12 12 12 0603 39 12 12 0603 39 12 12 1 22 16 5% 5% 5% 1% 1% 30ppm 5% 5% 5% 5% 5% <0.25pF <0.25pF 5% 5% 5%
pF
C11 C12
0603 0603
pF pF
C13
pF
L1
nH
L2
nH
L3
nH
R1 R2 U1 X1
0603 0603 QFN32L/5x5 LxWxH = 4.0x2.5x0.8
M k MHz
Table 16 Recommended external components, single ended connection to 50 antenna.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
PCB LAYOUT EXAMPLE, SINGLE ENDED CONNECTION TO 50 ANTENNA
Figure 14 shows a PCB layout example for the application schematic in Figure 13. A double-sided FR-4 board of 1.6mm thickness is used. This PCB has a ground plane on the bottom layer. Additionally, there are ground areas on the component side of the board to ensure sufficient grounding of critical components. A large number of via holes connect the top layer ground areas to the bottom layer ground plane.
No components in bottom layer
a) Top silk screen
b) Bottom silk screen
c) Top view
d) Bottom view
Figure 14 PCB layout example for NRF905, single ended connection to 50 antenna by using a differential to single ended matching network. A fully qualified RF-layout for the NRF905 and its surrounding components, including antennas and matching networks, can be downloaded from www.nordicsemi.no.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
DEFINITIONS
Data sheet status
Objective product specification Preliminary product specification Product specification This datasheet contains target specifications for product development. This datasheet contains preliminary data; supplementary data may be published from Nordic Semiconductor ASA later. This datasheet contains final product specifications. Nordic Semiconductor ASA reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Limiting values
Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Specifications sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Table 17 Definitions. Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic Semiconductor does not assume any liability arising out of the application or use of any product or circuits described herein.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale.
Product specification revision date: 07.06.2004 Datasheet order code: 070604NRF905
All rights reserved (R). Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
YOUR NOTES
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PRODUCT SPECIFICATION
NRF905 Single Chip 433/868/915 MHz Radio Transceiver
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